295 lines
6.0 KiB
PHP
295 lines
6.0 KiB
PHP
; async variables somewhere in RAM
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PUSHS "Async Variables", WRAM0[ASYNC_VARS_START]
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vAsyncAF: dw
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vAsyncHL: dw
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vAsyncDE: dw
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vAsyncBC: dw
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vAsyncPC: dw
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vAsyncMainSP: dw
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vAsyncThreadSP: dw
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vAsyncIsBusy: db
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POPS
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; canonical ordering to push should be: AF, BC, DE, HL,
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def ASYNC_STACK_TOP equ $ffc0
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; stack top is ffc0
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; first value on the stack is the early return pointer, at ffbe = ffc0-2
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; second value is the destination of the async call, at ffbc = ffbe-2 = ffc0-2-2
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def ASYNC_THREAD_CALL equ ASYNC_STACK_TOP - 2 - 2
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; timing for async execution, in scanlines
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def SAFE_ASYNC_START EQU 145
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def SAFE_ASYNC_END EQU 0
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Async_Kill:
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ld hl, ASYNC_STACK_TOP ; - 2 ; commenting this out so we see if this ever produces an issues
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ld a, l
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ld [vAsyncThreadSP], a
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ld a, h
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ld [vAsyncThreadSP+1], a
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ld a, 0
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ld [vAsyncIsBusy], a
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; unset next call
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ld hl, rIE
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res 1, [hl] ; disable stat interrupt
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ld hl, rIF
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res 1, [hl] ; clear the interrupt
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ret
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Async_Spawn_HL:
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di
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ld a, l
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ld [ASYNC_THREAD_CALL], a
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ld a, h
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ld [ASYNC_THREAD_CALL+1], a
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Async_Spawn:
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di
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nop
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; save all the registers
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push af
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ld a, l
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ld [vAsyncHL], a
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ld a, h
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ld [vAsyncHL+1], a
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ld a, e
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ld [vAsyncDE], a
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ld a, d
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ld [vAsyncDE+1], a
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ld a, c
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ld [vAsyncBC], a
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ld a, b
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ld [vAsyncBC+1], a
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pop hl
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ld a, l
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ld [vAsyncAF], a
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ld a, h
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ld [vAsyncAF+1], a
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; save main sp
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ld hl, sp+0
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ld a, l
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ld [vAsyncMainSP], a
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ld a, h
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ld [vAsyncMainSP+1], a
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; switch to thread sp
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ld a, LOW(ASYNC_STACK_TOP)
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ld l, a
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ld a, HIGH(ASYNC_STACK_TOP)
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ld h, a
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ld sp, hl
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; are these next two steps necessary? those values should always be prepopulated
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; push early return onto thread stack
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ld l, LOW(Async_EarlyReturn)
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ld h, HIGH(Async_EarlyReturn)
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push hl
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; requestedd pc is expected to be set at ASYNC_THREAD_CALL by the calling func
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ld hl, sp-2
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ld sp, hl
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; push registers
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; canonical ordering to push should be: AF, BC, DE, HL,
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ld a, [vAsyncAF]
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ld l, a
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ld a, [vAsyncAF+1]
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ld h, a
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push hl
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ld a, [vAsyncBC]
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ld l, a
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ld a, [vAsyncBC+1]
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ld h, a
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push hl
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ld a, [vAsyncDE]
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ld l, a
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ld a, [vAsyncDE+1]
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ld h, a
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push hl
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ld a, [vAsyncHL]
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ld l, a
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ld a, [vAsyncHL+1]
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ld h, a
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push hl
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; save current sp to vAsyncThreadSP
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ld hl, sp+0
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ld a, l
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ld [vAsyncThreadSP], a
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ld a, h
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ld [vAsyncThreadSP+1], a
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; now the stack looks like: early return, ASYNC_THREAD_CALL, AF, BC, DE, HL
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; switch back to main thread.
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; register enterthread
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ld a, LOW(Async_EnterThread)
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ld [INTERRUPT_LCD], a
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ld a, HIGH(Async_EnterThread)
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ld [INTERRUPT_LCD + 1], a; set interrupt handler to "ENTER THREAD"
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ld a, SAFE_ASYNC_START ; CHANGE ME TO ADJUST SAFE TRANSFER TIMING
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ld [rLYC], a ; set LYC
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ld hl, rIE
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set 1, [hl] ; enable vblank
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ld hl, rSTAT
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set 6, [hl] ; set the stat interrupt to LYC mode
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ld hl, rIF
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res 1, [hl] ; clear the interrupt so we don't immediately fire it
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ld a, 1
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ld [vAsyncIsBusy], a
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; restore main sp
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ld a, [vAsyncMainSP]
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ld l, a
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ld a, [vAsyncMainSP+1]
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ld h, a
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ld sp, hl
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; restore registers from memory
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ld a, [vAsyncAF]
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ld l, a
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ld a, [vAsyncAF+1]
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ld h, a
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push hl ; this is so we can pop af when we're done
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ld a, [vAsyncHL]
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ld l, a
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ld a, [vAsyncHL+1]
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ld h, a
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ld a, [vAsyncDE]
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ld e, a
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ld a, [vAsyncDE+1]
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ld d, a
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ld a, [vAsyncBC]
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ld c, a
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ld a, [vAsyncBC+1]
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ld b, a
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pop af
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reti
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Async_EnterThread:
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;stack looks like:
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;c113 (SMC int @ LYC 90 pc), 004b (hw int @ LYC 90 pc), outer context pc
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; 16 cycles
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push af
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push bc
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push de
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push hl
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;af, de, bc, hl, c113 (SMC interrupt pc), 004b (hardwired interrput pc), outer context pc
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; 18 cycles
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ld a, LOW(Async_ExitThread)
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ld [INTERRUPT_LCD], a
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ld a, HIGH(Async_ExitThread)
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ld [INTERRUPT_LCD+1], a
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ld a, SAFE_ASYNC_END ; CHANGE ME TO ADJUST SAFE TRANSFER TIMING
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ld [rLYC], a ; set lcd interrupt handler to EXIT SAFE MODE on line 153
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; 5 cycles
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; save main thread stack pointer
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ld [vAsyncMainSP], sp
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; 12 cycless
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; load side thread stack pointer
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ld a, [vAsyncThreadSP] ; 4
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ld l, a ; 1
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ld a, [vAsyncThreadSP+1] ; 4
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ld h, a ; 1
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ld sp, hl ; 2
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; 12 cycles
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; pop registers
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; canonical ordering to push should be: AF, BC, DE, HL,
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; pop is HL, DE, BC, AF
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pop hl
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pop de
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pop bc
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pop af
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; 4 cycles
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reti ; "return" to the vAsyncPC wee put on the stack previously. ; 4
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; this is more or less a jump, not a return.
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; is that the source of our problems?
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; after this instruction executes, stack looks like:
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; early return, af, de, bc, hl, PC (smc int), PC (hardwired int), PC (outer context)
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; and we'll be in the async thread, executing
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Async_ExitThread:
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; save interrupt registers (AF, BC, DE, HL)
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push af
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push bc
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push de
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push hl
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ld a, LOW(Async_EnterThread)
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ld [INTERRUPT_LCD], a
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ld a, HIGH(Async_EnterThread)
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ld [INTERRUPT_LCD+1], a
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ld a, SAFE_ASYNC_START ; CHANGE ME TO ADJUST SAFE TRANSFER TIMING
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ld [rLYC], a ; set lcd interrupt handler to EXIT SAFE MODE on line 153
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; save side thread stack pointer
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ld [vAsyncThreadSP], sp
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; load main thread stack pointer
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ld a, [vAsyncMainSP]
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ld l, a
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ld a, [vAsyncMainSP+1]
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ld h, a
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ld sp, hl
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; pop registers
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; canonical ordering to push should be: AF, BC, DE, HL,
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; pop is HL, DE, BC, AF
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pop hl
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pop de
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pop bc
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pop af
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reti
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Async_EarlyReturn:
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di
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; don't care about current registers bc we're done executing.
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; store side thread SP, so everyone knows that the side thread stack is empty
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ld [vAsyncThreadSP], sp ; 5 cycles instead of 13
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ld a, 0
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ld [vAsyncIsBusy], a
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; unset next call
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ld hl, rIE
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res 1, [hl] ; disable stat interrupt
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ld hl, rIF
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res 1, [hl] ; clear the interrupt
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; load main thread stack pointer
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ld a, [vAsyncMainSP]
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ld l, a
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ld a, [vAsyncMainSP+1]
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ld h, a
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ld sp, hl
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; restore the pre-interrupt registers, return and enable interrupts
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pop af
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pop de
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pop bc
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pop hl
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reti
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